BibTeX
@inproceedings{DBLP:conf/vlsid/PradhanV09,
author = {Almitra Pradhan and
Ranga Vemuri},
title = {Efficient Synthesis of a Uniformly Spread Layout Aware Pareto
Surface for Analog Circuits},
booktitle = {VLSI Design},
year = {2009},
pages = {131-136},
ee = {http://dx.doi.org/10.1109/VLSI.Design.2009.67},
crossref = {DBLP:conf/vlsid/2009},
bibsource = {DBLP, http://dblp.uni-trier.de}
}
@proceedings{DBLP:conf/vlsid/2009,
title = {VLSI Design 2009: Improving Productivity through Higher
Abstraction, The 22nd International Conference on VLSI Design,
New Delhi, India, 5-9 January 2009},
booktitle = {VLSI Design},
publisher = {IEEE},
year = {2009},
isbn = {978-0-7695-3506-7},
bibsource = {DBLP, http://dblp.uni-trier.de}
}
Copyright © 2009-04-21 by Michael Ley (ley@uni-trier.de)