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BibTeX record conf/vlsid/PradhanV09
@inproceedings{DBLP:conf/vlsid/PradhanV09, author = {Almitra Pradhan and Ranga Vemuri}, title = {Efficient Synthesis of a Uniformly Spread Layout Aware Pareto Surface for Analog Circuits}, booktitle = {{VLSI} Design 2009: Improving Productivity through Higher Abstraction, The 22nd International Conference on {VLSI} Design, New Delhi, India, 5-9 January 2009}, pages = {131--136}, publisher = {{IEEE} Computer Society}, year = {2009}, url = {https://doi.org/10.1109/VLSI.Design.2009.67}, doi = {10.1109/VLSI.DESIGN.2009.67}, timestamp = {Fri, 24 Mar 2023 00:04:00 +0100}, biburl = {https://dblp.org/rec/conf/vlsid/PradhanV09.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
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