<?xml version="1.0"?>
<dblp>
<inproceedings key="conf/vlsid/PradhanAV05" mdate="2005-02-07">
<author>Dhiraj K. Pradhan</author>
<author>Magdy S. Abadir</author>
<author>Mauricio Varea</author>
<title>Recent Advances in Verification, Equivalence Checking and SAT-Solvers.</title>
<pages>14</pages>
<year>2005</year>
<crossref>conf/vlsid/2005</crossref>
<booktitle>VLSI Design</booktitle>
<ee>http://csdl.computer.org/comp/proceedings/vlsid/2005/2264/00/22640014.pdf</ee>
<url>db/conf/vlsid/vlsid2005.html#PradhanAV05</url>
</inproceedings>
</dblp>
