DBLP Record 'conf/vlsid/PengAG02'

BibTeX

@inproceedings{DBLP:conf/vlsid/PengAG02,
  author    = {Junyu Peng and
               Samar Abdi and
               Daniel Gajski},
  title     = {Automatic Model Refinement for Fast Architecture Exploration},
  booktitle = {VLSI Design},
  year      = {2002},
  pages     = {332-337},
  ee        = {http://csdl.computer.org/comp/proceedings/vlsid/2002/1441/00/14410332abs.htm},
  crossref  = {DBLP:conf/vlsid/2002},
  bibsource = {DBLP, http://dblp.uni-trier.de}
}

@proceedings{DBLP:conf/vlsid/2002,
  title     = {Proceedings of the ASPDAC 2002 / VLSI Design 2002, CD-ROM,
               7-11 January 2002, Bangalore, India},
  booktitle = {VLSI Design / ASPDAC},
  publisher = {IEEE Computer Society},
  year      = {2002},
  isbn      = {0-7695-1299-2},
  crossref  = {DBLP:conf/vlsid/2002},
  bibsource = {DBLP, http://dblp.uni-trier.de}
}