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BibTeX record conf/vlsid/ParaneTM18
@inproceedings{DBLP:conf/vlsid/ParaneTM18, author = {Khyamling Parane and Basavaraj Talawar and Prabhu B. M. Prasad}, title = {YaNoC: Yet Another Network-on-Chip Simulation Acceleration Engine Using FPGAs}, booktitle = {31st International Conference on {VLSI} Design and 17th International Conference on Embedded Systems, {VLSID} 2018, Pune, India, January 6-10, 2018}, pages = {67--72}, publisher = {{IEEE} Computer Society}, year = {2018}, url = {https://doi.org/10.1109/VLSID.2018.39}, doi = {10.1109/VLSID.2018.39}, timestamp = {Mon, 05 Feb 2024 20:31:41 +0100}, biburl = {https://dblp.org/rec/conf/vlsid/ParaneTM18.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
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