dblp.uni-trier.dewww.uni-trier.de

DBLP Record 'conf/vlsid/MinXHJ04'

BibTeX

@inproceedings{DBLP:conf/vlsid/MinXHJ04,
  author    = {Rui Min and
               Zhiyong Xu and
               Yiming Hu and
               Wen-Ben Jone},
  title     = {Partial Tag Comparison: A New Technology for Power-Efficient
               Set-Associative Cache Designs},
  booktitle = {VLSI Design},
  year      = {2004},
  pages     = {183-188},
  ee        = {http://csdl.computer.org/comp/proceedings/vlsid/2004/2072/00/20720183abs.htm},
  crossref  = {DBLP:conf/vlsid/2004},
  bibsource = {DBLP, http://dblp.uni-trier.de}
}
@proceedings{DBLP:conf/vlsid/2004,
  title     = {17th  International Conference on VLSI Design (VLSI Design
               2004), with the 3rd International Conference on Embedded
               Systems Design, 5-9 January 2004, Mumbai, India},
  booktitle = {VLSI Design},
  publisher = {IEEE Computer Society},
  year      = {2004},
  isbn      = {0-7695-2072-3},
  bibsource = {DBLP, http://dblp.uni-trier.de}
}

Copyright © 2004-04-20 by Michael Ley (ley@uni-trier.de)