BibTeX record conf/vlsid/MinPP11

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@inproceedings{DBLP:conf/vlsid/MinPP11,
  author       = {Su Myat Min and
                  Jorgen Peddersen and
                  Sri Parameswaran},
  title        = {Realizing Cycle Accurate Processor Memory Simulation via Interface
                  Abstraction},
  booktitle    = {{VLSI} Design 2011: 24th International Conference on {VLSI} Design,
                  {IIT} Madras, Chennai, India, 2-7 January 2011},
  pages        = {141--146},
  publisher    = {{IEEE} Computer Society},
  year         = {2011},
  url          = {https://doi.org/10.1109/VLSID.2011.36},
  doi          = {10.1109/VLSID.2011.36},
  timestamp    = {Fri, 24 Mar 2023 00:03:59 +0100},
  biburl       = {https://dblp.org/rec/conf/vlsid/MinPP11.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

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