BibTeX record conf/vlsid/KumarPDD23

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@inproceedings{DBLP:conf/vlsid/KumarPDD23,
  author       = {Vivek Kumar and
                  Jyoti Patel and
                  Arnab Datta and
                  Sudeb Dasgupta},
  title        = {{FEM} modeling of gate resistance for 5 nm {SGC/DGC} Stacked Nanosheet
                  Transistor},
  booktitle    = {36th International Conference on {VLSI} Design and 2023 22nd International
                  Conference on Embedded Systems, {VLSID} 2023, Hyderabad, India, January
                  8-12, 2023},
  pages        = {1--6},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.1109/VLSID57277.2023.00067},
  doi          = {10.1109/VLSID57277.2023.00067},
  timestamp    = {Sat, 30 Sep 2023 09:58:22 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsid/KumarPDD23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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