BibTeX record conf/vlsid/JainNFS97

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@inproceedings{DBLP:conf/vlsid/JainNFS97,
  author       = {Jawahar Jain and
                  Amit Narayan and
                  Masahiro Fujita and
                  Alberto L. Sangiovanni{-}Vincentelli},
  title        = {Formal Verification of Combinational Circuit},
  booktitle    = {10th International Conference on {VLSI} Design {(VLSI} Design 1997),
                  4-7 January 1997, Hyderabad, India},
  pages        = {218--225},
  publisher    = {{IEEE} Computer Society},
  year         = {1997},
  url          = {https://doi.org/10.1109/ICVD.1997.568079},
  doi          = {10.1109/ICVD.1997.568079},
  timestamp    = {Fri, 24 Mar 2023 00:03:59 +0100},
  biburl       = {https://dblp.org/rec/conf/vlsid/JainNFS97.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}