BibTeX record conf/vlsid/IslamSC24

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@inproceedings{DBLP:conf/vlsid/IslamSC24,
  author       = {Md. Najrul Islam and
                  Rahul Shrestha and
                  Shubhajit Roy Chowdhury},
  title        = {Low-Complexity lassification Technique and Hardware-Efficient Classify-Unit
                  Architecture for {CNN} Accelerator},
  booktitle    = {37th International Conference on {VLSI} Design and 23rd International
                  Conference on Embedded Systems, {VLSID} 2024, Kolkata, India, January
                  6-10, 2024},
  pages        = {210--215},
  publisher    = {{IEEE}},
  year         = {2024},
  url          = {https://doi.org/10.1109/VLSID60093.2024.00041},
  doi          = {10.1109/VLSID60093.2024.00041},
  timestamp    = {Tue, 07 May 2024 20:10:04 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsid/IslamSC24.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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