Malay K. Ganai Akira Mukaiyama Aarti Gupta Kazutoshi Wakabayashi Synthesizing "Verification Aware" Models: Why and How? 50-56 2007 conf/vlsid/2007 VLSI Design http://doi.ieeecomputersociety.org/10.1109/VLSID.2007.151 db/conf/vlsid/vlsid2007.html#GanaiMGW07