<?xml version="1.0"?>
<dblp>
<inproceedings key="conf/vlsid/FujiwaraOINKY09" mdate="2009-04-21">
<author>Hidehiro Fujiwara</author>
<author>Shunsuke Okumura</author>
<author>Yusuke Iguchi</author>
<author>Hiroki Noguchi</author>
<author>Hiroshi Kawaguchi</author>
<author>Masahiko Yoshimoto</author>
<title>A 7T/14T Dependable SRAM and its Array Structure to Avoid Half Selection.</title>
<pages>295-300</pages>
<year>2009</year>
<booktitle>VLSI Design</booktitle>
<ee>http://dx.doi.org/10.1109/VLSI.Design.2009.54</ee>
<crossref>conf/vlsid/2009</crossref>
<url>db/conf/vlsid/vlsid2009.html#FujiwaraOINKY09</url>
</inproceedings>
</dblp>
