BibTeX record conf/vlsid/DevanathanBP15

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@inproceedings{DBLP:conf/vlsid/DevanathanBP15,
  author       = {V. R. Devanathan and
                  Lakshmanan Balasubramanian and
                  Rubin A. Parekhji},
  title        = {New Methods for Simulation Speed-up and Test Qualification with Analog
                  Fault Simulation},
  booktitle    = {28th International Conference on {VLSI} Design, {VLSID} 2015, Bangalore,
                  India, January 3-7, 2015},
  pages        = {363--368},
  publisher    = {{IEEE} Computer Society},
  year         = {2015},
  url          = {https://doi.org/10.1109/VLSID.2015.67},
  doi          = {10.1109/VLSID.2015.67},
  timestamp    = {Fri, 24 Mar 2023 00:03:59 +0100},
  biburl       = {https://dblp.org/rec/conf/vlsid/DevanathanBP15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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