Jatindra Kumar Deka Pallab Dasgupta P. P. Chakrabarti An Efficiently Checkable Subset of TCTL for Formal Verification of Transition Systems with Delays. 294-299 1999 conf/vlsid/1999 VLSI Design http://doi.ieeecomputersociety.org/10.1109/ICVD.1999.745163 db/conf/vlsid/vlsid1999.html#DekaDC99