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BibTeX record conf/vlsid/CharyB06a
@inproceedings{DBLP:conf/vlsid/CharyB06a, author = {Shweta Chary and Michael L. Bushnell}, title = {Analog Macromodeling for Combined Resistive Vias, Resistive Bridges, and Capacitive Crosstalk Delay Faults}, booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006), 3-7 January 2006, Hyderabad, India}, pages = {818--823}, publisher = {{IEEE} Computer Society}, year = {2006}, url = {https://doi.org/10.1109/VLSID.2006.47}, doi = {10.1109/VLSID.2006.47}, timestamp = {Fri, 24 Mar 2023 00:04:00 +0100}, biburl = {https://dblp.org/rec/conf/vlsid/CharyB06a.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
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