Symbolic Time-Domain Behavioral and Performance Modeling of Linear Analog Circuits Using an Efficient Symbolic Newton-Iteration Algorithm for Pole Extraction.

Ritochit Chakraborty Mukesh Ranjan Ranga Vemuri Symbolic Time-Domain Behavioral and Performance Modeling of Linear Analog Circuits Using an Efficient Symbolic Newton-Iteration Algorithm for Pole Extraction. 689-694 2006 conf/vlsid/2006 VLSI Design http://doi.ieeecomputersociety.org/10.1109/VLSID.2006.153 db/conf/vlsid/vlsid2006.html#ChakrabortyRV06