Reconfiguring CMOS as Pseudo N/PMOS for Defect Tolerance in Nano-Scale CMOS.

Maryam Ashouei Adit D. Singh Abhijit Chatterjee Reconfiguring CMOS as Pseudo N/PMOS for Defect Tolerance in Nano-Scale CMOS. 27-32 2008 VLSI Design http://doi.ieeecomputersociety.org/10.1109/VLSI.2008.104 conf/vlsid/2008 db/conf/vlsid/vlsid2008.html#AshoueiSC08