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BibTeX record conf/vlsic/OnukiUTIAOKYLWS16
@inproceedings{DBLP:conf/vlsic/OnukiUTIAOKYLWS16, author = {Tatsuya Onuki and Wataru Uesugi and Hikaru Tamura and Atsuo Isobe and Yoshinori Ando and Satoru Okamoto and Kiyoshi Kato and Tri Rung Yew and Chen Bin Lin and J. Y. Wu and Chi Chang Shuai and Shao Hui Wu and James Myers and Klaus Doppler and Masahiro Fujita and Shunpei Yamazaki}, title = {Embedded memory and {ARM} Cortex-M0 core using 60-nm C-axis aligned crystalline indium-gallium-zinc oxide {FET} integrated with 65-nm Si {CMOS}}, booktitle = {2016 {IEEE} Symposium on {VLSI} Circuits, {VLSIC} 2016, Honolulu, HI, USA, June 15-17, 2016}, pages = {1--2}, publisher = {{IEEE}}, year = {2016}, url = {https://doi.org/10.1109/VLSIC.2016.7573504}, doi = {10.1109/VLSIC.2016.7573504}, timestamp = {Wed, 16 Oct 2019 14:14:49 +0200}, biburl = {https://dblp.org/rec/conf/vlsic/OnukiUTIAOKYLWS16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
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