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BibTeX record conf/vlsic/NadeauPC15
@inproceedings{DBLP:conf/vlsic/NadeauPC15, author = {Phillip M. Nadeau and Arun Paidimarri and Anantha P. Chandrakasan}, title = {4.2 pW timer for heavily duty-cycled systems}, booktitle = {Symposium on {VLSI} Circuits, {VLSIC} 2015, Kyoto, Japan, June 17-19, 2015}, pages = {240}, publisher = {{IEEE}}, year = {2015}, url = {https://doi.org/10.1109/VLSIC.2015.7231272}, doi = {10.1109/VLSIC.2015.7231272}, timestamp = {Wed, 16 Oct 2019 14:14:49 +0200}, biburl = {https://dblp.org/rec/conf/vlsic/NadeauPC15.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
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