BibTeX record conf/vlsic/Cho0LZ21

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@inproceedings{DBLP:conf/vlsic/Cho0LZ21,
  author       = {Sung{-}Gun Cho and
                  Wei Tang and
                  Chester Liu and
                  Zhengya Zhang},
  title        = {{PETRA:} {A} 22nm 6.97TFLOPS/W AIB-Enabled Configurable Matrix and
                  Convolution Accelerator Integrated with an Intel Stratix 10 {FPGA}},
  booktitle    = {2021 Symposium on {VLSI} Circuits, Kyoto, Japan, June 13-19, 2021},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2021},
  url          = {https://doi.org/10.23919/VLSICircuits52068.2021.9492517},
  doi          = {10.23919/VLSICIRCUITS52068.2021.9492517},
  timestamp    = {Wed, 07 Dec 2022 23:09:32 +0100},
  biburl       = {https://dblp.org/rec/conf/vlsic/Cho0LZ21.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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