BibTeX record conf/vlsic/ChenKDBZ16

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@inproceedings{DBLP:conf/vlsic/ChenKDBZ16,
  author       = {Zhanping Chen and
                  Sarvesh H. Kulkarni and
                  Vincent E. Dorgan and
                  Uddalak Bhattacharya and
                  Kevin Zhang},
  title        = {A 0.9um\({}^{\mbox{2}}\) 1T1R bit cell in 14nm SoC process for metal-fuse
                  {OTP} array with hierarchical bitline, bit level redundancy, and power
                  gating},
  booktitle    = {2016 {IEEE} Symposium on {VLSI} Circuits, {VLSIC} 2016, Honolulu,
                  HI, USA, June 15-17, 2016},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2016},
  url          = {https://doi.org/10.1109/VLSIC.2016.7573506},
  doi          = {10.1109/VLSIC.2016.7573506},
  timestamp    = {Fri, 26 Apr 2024 22:59:07 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsic/ChenKDBZ16.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}