BibTeX record conf/vlsic/ChenFCG20

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@inproceedings{DBLP:conf/vlsic/ChenFCG20,
  author       = {Zhengyu Chen and
                  Sihua Fu and
                  Qiankai Cao and
                  Jie Gu},
  title        = {A Mixed-Signal Time-Domain Generative Adversarial Network Accelerator
                  with Efficient Subthreshold Time Multiplier and Mixed-Signal On-Chip
                  Training for Low Power Edge Devices},
  booktitle    = {{IEEE} Symposium on {VLSI} Circuits, {VLSI} Circuits 2020, Honolulu,
                  HI, USA, June 16-19, 2020},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2020},
  url          = {https://doi.org/10.1109/VLSICircuits18222.2020.9162829},
  doi          = {10.1109/VLSICIRCUITS18222.2020.9162829},
  timestamp    = {Fri, 11 Nov 2022 08:02:55 +0100},
  biburl       = {https://dblp.org/rec/conf/vlsic/ChenFCG20.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}