BibTeX record conf/vlsic/AugustineAMORSM21

download as .bib file

@inproceedings{DBLP:conf/vlsic/AugustineAMORSM21,
  author       = {Charles Augustine and
                  A. Afzal and
                  U. Misgar and
                  Abdullah A. Owahid and
                  A. Raman and
                  K. Subramanian and
                  Feroze Merchant and
                  James W. Tschanz and
                  Muhammad M. Khellah},
  title        = {All-Digital Closed-Loop Unified Retention/Wake-Up Clamp in a 10nm
                  4-Core x86 {IP}},
  booktitle    = {2021 Symposium on {VLSI} Circuits, Kyoto, Japan, June 13-19, 2021},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2021},
  url          = {https://doi.org/10.23919/VLSICircuits52068.2021.9492376},
  doi          = {10.23919/VLSICIRCUITS52068.2021.9492376},
  timestamp    = {Tue, 03 Oct 2023 15:36:21 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsic/AugustineAMORSM21.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
a service of  Schloss Dagstuhl - Leibniz Center for Informatics

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.