BibTeX record conf/vlsi/VieiraGQZTKAG19a

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@inproceedings{DBLP:conf/vlsi/VieiraGQZTKAG19a,
  author       = {Jo{\~{a}}o Vieira and
                  Edouard Giacomin and
                  Yasir Mahmood Qureshi and
                  Marina Zapater and
                  Xifan Tang and
                  Shahar Kvatinsky and
                  David Atienza and
                  Pierre{-}Emmanuel Gaillardon},
  editor       = {Carolina Metzler and
                  Pierre{-}Emmanuel Gaillardon and
                  Giovanni De Micheli and
                  Carlos Silva C{\'{a}}rdenas and
                  Ricardo Reis},
  title        = {Accelerating Inference on Binary Neural Networks with Digital {RRAM}
                  Processing},
  booktitle    = {VLSI-SoC: New Technology Enabler - 27th {IFIP} {WG} 10.5/IEEE International
                  Conference on Very Large Scale Integration, VLSI-SoC 2019, Cusco,
                  Peru, October 6-9, 2019, Revised and Extended Selected Papers},
  series       = {{IFIP} Advances in Information and Communication Technology},
  volume       = {586},
  pages        = {257--278},
  publisher    = {Springer},
  year         = {2019},
  url          = {https://doi.org/10.1007/978-3-030-53273-4\_12},
  doi          = {10.1007/978-3-030-53273-4\_12},
  timestamp    = {Mon, 27 Jul 2020 14:04:37 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsi/VieiraGQZTKAG19a.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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