BibTeX record conf/vlsi/SerunjogiLRS17

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@inproceedings{DBLP:conf/vlsi/SerunjogiLRS17,
  author       = {Solomon Michael Serunjogi and
                  Kai{-}Wei Lin and
                  Mahmoud Rasras and
                  Mihai Sanduleanu},
  title        = {Low-jitter, plain vanilla {CMOS} {CDR} with half-rate linear {PD}
                  and half rate frequency detector},
  booktitle    = {2017 {IFIP/IEEE} International Conference on Very Large Scale Integration,
                  VLSI-SoC 2017, Abu Dhabi, United Arab Emirates, October 23-25, 2017},
  pages        = {1--6},
  publisher    = {{IEEE}},
  year         = {2017},
  url          = {https://doi.org/10.1109/VLSI-SoC.2017.8203490},
  doi          = {10.1109/VLSI-SOC.2017.8203490},
  timestamp    = {Sun, 22 Aug 2021 18:31:54 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsi/SerunjogiLRS17.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}