<?xml version="1.0"?>
<dblp>
<inproceedings key="conf/vlsi/PlyaskinMGCH10" mdate="2010-11-24">
<author>Roman Plyaskin</author>
<author>Alejandro Masrur</author>
<author>Martin Geier</author>
<author>Samarjit Chakraborty</author>
<author>Andreas Herkersdorf</author>
<title>High-level timing analysis of concurrent applications on MPSoC platforms using memory-aware trace-driven simulations.</title>
<pages>229-234</pages>
<year>2010</year>
<booktitle>VLSI-SoC</booktitle>
<ee>http://dx.doi.org/10.1109/VLSISOC.2010.5642665</ee>
<crossref>conf/vlsi/2010soc</crossref>
<url>db/conf/vlsi/vlsisoc2010.html#PlyaskinMGCH10</url>
</inproceedings>
</dblp>
