Design of a 1.2-V 130nm CMOS 13-bit@40MS/s Cascade 2-2-1 Continuous-Time Sigma-Delta Modulator.

Ramon Tortosa Navas Antonio Aceituno José Manuel de la Rosa Francisco V. Fernández Ángel Rodríguez-Vázquez Design of a 1.2-V 130nm CMOS 13-bit@40MS/s Cascade 2-2-1 Continuous-Time Sigma-Delta Modulator. 267-271 2006 conf/vlsi/2006soc VLSI-SoC http://dx.doi.org/10.1109/VLSISOC.2006.313245 db/conf/vlsi/vlsisoc2006.html#NavasARFR06