BibTeX record conf/vlsi/MurganMPBG06

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@inproceedings{DBLP:conf/vlsi/MurganMPBG06,
  author       = {Tudor Murgan and
                  Oliver Mitea and
                  Sujan Pandey and
                  Petru Bogdan Bacinschi and
                  Manfred Glesner},
  title        = {Simultaneous Placement and Buffer Planning for Reduction of Power
                  Consumption in Interconnects and Repeaters},
  booktitle    = {{IFIP} VLSI-SoC 2006, {IFIP} {WG} 10.5 International Conference on
                  Very Large Scale Integration of System-on-Chip, Nice, France, 16-18
                  October 2006},
  pages        = {302--307},
  publisher    = {{IEEE}},
  year         = {2006},
  url          = {https://doi.org/10.1109/VLSISOC.2006.313251},
  doi          = {10.1109/VLSISOC.2006.313251},
  timestamp    = {Wed, 24 May 2017 08:29:32 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsi/MurganMPBG06.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}