BibTeX record conf/vlsi/MandalTBC18

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@inproceedings{DBLP:conf/vlsi/MandalTBC18,
  author       = {Swagata Mandal and
                  Yaswanth Tavva and
                  Debjyoti Bhattacharjee and
                  Anupam Chattopadhyay},
  editor       = {Nicola Bombieri and
                  Graziano Pravadelli and
                  Masahiro Fujita and
                  Todd M. Austin and
                  Ricardo Reis},
  title        = {ReRAM Based In-Memory Computation of Single Bit Error Correcting {BCH}
                  Code},
  booktitle    = {VLSI-SoC: Design and Engineering of Electronics Systems Based on New
                  Computing Paradigms - 26th {IFIP} {WG} 10.5/IEEE International Conference
                  on Very Large Scale Integration, VLSI-SoC 2018, Verona, Italy, October
                  8-10, 2018, Revised and Extended Selected Papers},
  series       = {{IFIP} Advances in Information and Communication Technology},
  volume       = {561},
  pages        = {128--146},
  publisher    = {Springer},
  year         = {2018},
  url          = {https://doi.org/10.1007/978-3-030-23425-6\_7},
  doi          = {10.1007/978-3-030-23425-6\_7},
  timestamp    = {Mon, 15 Jun 2020 17:09:51 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsi/MandalTBC18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}