<?xml version="1.0"?>
<dblp>
<inproceedings key="conf/vlsi/JoannonBRTC07" mdate="2008-05-09">
<author>Yves Joannon</author>
<author>Vincent Beroulle</author>
<author>Chantal Robach</author>
<author>Smail Tedjini</author>
<author>Jean-Louis Carbon&#233;ro</author>
<title>Qualification of behavioral level design validation for AMS &amp; RF SoCs.</title>
<pages>206-211</pages>
<year>2007</year>
<booktitle>VLSI-SoC</booktitle>
<ee>http://dx.doi.org/10.1109/VLSISOC.2007.4402499</ee>
<crossref>conf/vlsi/2007soc</crossref>
<url>db/conf/vlsi/vlsisoc2007.html#JoannonBRTC07</url>
</inproceedings>
</dblp>
