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BibTeX record conf/vlsi/JayakrishnanCK16
@inproceedings{DBLP:conf/vlsi/JayakrishnanCK16, author = {Mini Jayakrishnan and Alan Chang and Tae{-}Hyoung Kim}, title = {Power and area efficient clock stretching and critical path reshaping for error resilience}, booktitle = {2016 {IFIP/IEEE} International Conference on Very Large Scale Integration, VLSI-SoC 2016, Tallinn, Estonia, September 26-28, 2016}, pages = {1--6}, publisher = {{IEEE}}, year = {2016}, url = {https://doi.org/10.1109/VLSI-SoC.2016.7753570}, doi = {10.1109/VLSI-SOC.2016.7753570}, timestamp = {Wed, 16 Oct 2019 14:14:49 +0200}, biburl = {https://dblp.org/rec/conf/vlsi/JayakrishnanCK16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
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