BibTeX record: conf/vlsi/HoL10a

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@inproceedings{DBLP:conf/vlsi/HoL10a,
  author    = {{Tsung-Yi} Ho and
               {Sheng-Hung} Liu},
  title     = {Fast Legalization for Standard Cell Placement with Simultaneous Wirelength
               and Displacement Minimization.},
  booktitle = {VLSI-SoC: Forward-Looking Trends in {IC} and Systems Design - 18th
               {IFIP} {WG} 10.5/IEEE International Conference on Very Large Scale
               Integration, VLSI-SoC 2010, Madrid, Spain, September 27-29, 2010,
               Revised Selected Papers},
  year      = {2010},
  pages     = {291--311},
  crossref  = {DBLP:conf/vlsi/2010socs},
  url       = {http://dx.doi.org/10.1007/978-3-642-28566-0_12},
  doi       = {10.1007/978-3-642-28566-0_12},
  timestamp = {Wed, 03 Sep 2014 06:53:38 +0200},
  biburl    = {http://dblp.uni-trier.de/rec/bib/conf/vlsi/HoL10a},
  bibsource = {dblp computer science bibliography, http://dblp.org}
}
@proceedings{DBLP:conf/vlsi/2010socs,
  editor    = {Jos\'{e} L. Ayala and
               David Atienza Alonso and
               Ricardo Reis},
  title     = {VLSI-SoC: Forward-Looking Trends in {IC} and Systems Design - 18th
               {IFIP} {WG} 10.5/IEEE International Conference on Very Large Scale
               Integration, VLSI-SoC 2010, Madrid, Spain, September 27-29, 2010,
               Revised Selected Papers},
  series    = {{IFIP} Advances in Information and Communication Technology},
  year      = {2012},
  volume    = {373},
  publisher = {Springer},
  url       = {http://dx.doi.org/10.1007/978-3-642-28566-0},
  doi       = {10.1007/978-3-642-28566-0},
  isbn      = {978-3-642-28565-3},
  timestamp = {Wed, 03 Sep 2014 06:53:38 +0200},
  biburl    = {http://dblp.uni-trier.de/rec/bib/conf/vlsi/2010socs},
  bibsource = {dblp computer science bibliography, http://dblp.org}
}