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BibTeX record conf/vlsi/FornoAKMU18
@inproceedings{DBLP:conf/vlsi/FornoAKMU18, author = {Evelina Forno and Andrea Acquaviva and Yuki Kobayashi and Enrico Macii and Gianvito Urgese}, title = {A Parallel Hardware Architecture For Quantum Annealing Algorithm Acceleration}, booktitle = {{IFIP/IEEE} International Conference on Very Large Scale Integration, VLSI-SoC 2018, Verona, Italy, October 8-10, 2018}, pages = {31--36}, publisher = {{IEEE}}, year = {2018}, url = {https://doi.org/10.1109/VLSI-SoC.2018.8644777}, doi = {10.1109/VLSI-SOC.2018.8644777}, timestamp = {Fri, 27 Mar 2020 08:58:31 +0100}, biburl = {https://dblp.org/rec/conf/vlsi/FornoAKMU18.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
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