BibTeX record conf/vlsi/FeitozaBM19

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@inproceedings{DBLP:conf/vlsi/FeitozaBM19,
  author       = {Renato S. Feitoza and
                  Manuel J. Barrag{\'{a}}n and
                  Salvador Mir},
  title        = {Reduced-Code Techniques for On-Chip Static Linearity Test of {SAR}
                  ADCs},
  booktitle    = {27th {IFIP/IEEE} International Conference on Very Large Scale Integration,
                  VLSI-SoC 2019, Cuzco, Peru, October 6-9, 2019},
  pages        = {263--268},
  publisher    = {{IEEE}},
  year         = {2019},
  url          = {https://doi.org/10.1109/VLSI-SoC.2019.8920377},
  doi          = {10.1109/VLSI-SOC.2019.8920377},
  timestamp    = {Wed, 28 Jun 2023 09:07:34 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsi/FeitozaBM19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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