BibTeX record conf/vlsi/EggermannRANA23

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@inproceedings{DBLP:conf/vlsi/EggermannRANA23,
  author       = {Gr{\'{e}}goire Eggermann and
                  Marco Rios and
                  Giovanni Ansaloni and
                  Sani R. Nassif and
                  David Atienza},
  title        = {A 16-bit Floating-Point Near-SRAM Architecture for Low-power Sparse
                  Matrix-Vector Multiplication},
  booktitle    = {31st {IFIP/IEEE} International Conference on Very Large Scale Integration,
                  VLSI-SoC 2023, Dubai, United Arab Emirates, October 16-18, 2023},
  pages        = {1--6},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.1109/VLSI-SoC57769.2023.10321838},
  doi          = {10.1109/VLSI-SOC57769.2023.10321838},
  timestamp    = {Wed, 06 Dec 2023 13:14:06 +0100},
  biburl       = {https://dblp.org/rec/conf/vlsi/EggermannRANA23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}