Obtaining delay distribution of dynamic logic circuits by error propagation at the electrical level.

Lucas Brusamarello Roberto da Silva Gilson I. Wirth Ricardo A. L. Reis Obtaining delay distribution of dynamic logic circuits by error propagation at the electrical level. 94-98 2007 VLSI-SoC http://dx.doi.org/10.1109/VLSISOC.2007.4402479 conf/vlsi/2007soc db/conf/vlsi/vlsisoc2007.html#BrusamarelloSWR07