Improving DPA Resistance of Quasi Delay Insensitive Circuits Using Randomly Time-shifted Acknowledgment Signals.

G. Fraidy Bouesse Marc Renaudin Gilles Sicard Improving DPA Resistance of Quasi Delay Insensitive Circuits Using Randomly Time-shifted Acknowledgment Signals. 11-24 2005 conf/vlsi/2005soc VLSI-SoC http://dx.doi.org/10.1007/978-0-387-73661-7_2 db/conf/vlsi/vlsisoc2005.html#BouesseRS05