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BibTeX record conf/vlsi/BoldingCCEHNW93
@inproceedings{DBLP:conf/vlsi/BoldingCCEHNW93, author = {Kevin Bolding and Sen{-}Ching S. Cheung and Sung{-}Eun Choi and Carl Ebeling and Soha Hassoun and Ton Anh Ngo and Robert Wille}, editor = {Kakayuki Yanagawa and Peter A. Ivey}, title = {The chaos router chip: design and implementation of an adaptive router}, booktitle = {{VLSI} 93, Proceedings of the {IFIP} {TC10/WG} 10.5 International Conference on Very Large Scale Integration, Grenoble, France, 7-10 September, 1993}, series = {{IFIP} Transactions}, volume = {{A-42}}, pages = {311--320}, publisher = {North-Holland}, year = {1993}, timestamp = {Fri, 15 Nov 2019 18:43:31 +0100}, biburl = {https://dblp.org/rec/conf/vlsi/BoldingCCEHNW93.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
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