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DBLP Record 'conf/vlsi/BazeghiMGTR07'

BibTeX

@inproceedings{DBLP:conf/vlsi/BazeghiMGTR07,
  author    = {Cyrus Bazeghi and
               Francisco J. Mesa-Martinez and
               Brian Greskamp and
               Josep Torrellas and
               Jose Renau},
  title     = {Estimating design time for system circuits},
  booktitle = {VLSI-SoC},
  year      = {2007},
  pages     = {60-65},
  ee        = {http://dx.doi.org/10.1109/VLSISOC.2007.4402473},
  crossref  = {DBLP:conf/vlsi/2007soc},
  bibsource = {DBLP, http://dblp.uni-trier.de}
}
@proceedings{DBLP:conf/vlsi/2007soc,
  title     = {IFIP VLSI-SoC 2007, IFIP WG 10.5 International Conference
               on Very Large Scale Integration of System-on-Chip, Atlanta,
               GA, USA, 15-17 October 2007},
  booktitle = {VLSI-SoC},
  publisher = {IEEE},
  year      = {2007},
  bibsource = {DBLP, http://dblp.uni-trier.de}
}

Copyright © 2008-05-09 by Michael Ley (ley@uni-trier.de)