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BibTeX record conf/vlsi/AmaravatiCR15a
@inproceedings{DBLP:conf/vlsi/AmaravatiCR15a, author = {Anvesha Amaravati and Manan Chugh and Arijit Raychowdhury}, editor = {Youngsoo Shin and Chi{-}Ying Tsui and Jae{-}Joon Kim and Kiyoung Choi and Ricardo Reis}, title = {A {SAR} Pipeline {ADC} Embedding Time Interleaved {DAC} Sharing for Ultra-low Power Camera Front Ends}, booktitle = {VLSI-SoC: Design for Reliability, Security, and Low Power - 23rd {IFIP} {WG} 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2015, Daejeon, Korea, October 5-7, 2015, Revised Selected Papers}, series = {{IFIP} Advances in Information and Communication Technology}, volume = {483}, pages = {131--149}, publisher = {Springer}, year = {2015}, url = {https://doi.org/10.1007/978-3-319-46097-0\_7}, doi = {10.1007/978-3-319-46097-0\_7}, timestamp = {Tue, 22 Oct 2019 15:21:19 +0200}, biburl = {https://dblp.org/rec/conf/vlsi/AmaravatiCR15a.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
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