BibTeX record conf/vlsi/AgarwalK16

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@inproceedings{DBLP:conf/vlsi/AgarwalK16,
  author       = {Sukarn Agarwal and
                  Hemangee K. Kapoor},
  title        = {Restricting writes for energy-efficient hybrid cache in multi-core
                  architectures},
  booktitle    = {2016 {IFIP/IEEE} International Conference on Very Large Scale Integration,
                  VLSI-SoC 2016, Tallinn, Estonia, September 26-28, 2016},
  pages        = {1--6},
  publisher    = {{IEEE}},
  year         = {2016},
  url          = {https://doi.org/10.1109/VLSI-SoC.2016.7753551},
  doi          = {10.1109/VLSI-SOC.2016.7753551},
  timestamp    = {Mon, 15 Jun 2020 17:09:51 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsi/AgarwalK16.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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