BibTeX record conf/vlsi-dat/ParanePT19

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@inproceedings{DBLP:conf/vlsi-dat/ParanePT19,
  author       = {Khyamling Parane and
                  Prabhu B. M. Prasad and
                  Basavaraj Talawar},
  title        = {Design of an Adaptive and Reliable Network on Chip Router Architecture
                  Using {FPGA}},
  booktitle    = {International Symposium on {VLSI} Design, Automation and Test, {VLSI-DAT}
                  2019, Hsinchu, Taiwan, April 22-25, 2019},
  pages        = {1--4},
  publisher    = {{IEEE}},
  year         = {2019},
  url          = {https://doi.org/10.1109/VLSI-DAT.2019.8741845},
  doi          = {10.1109/VLSI-DAT.2019.8741845},
  timestamp    = {Fri, 27 Mar 2020 08:46:13 +0100},
  biburl       = {https://dblp.org/rec/conf/vlsi-dat/ParanePT19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}