BibTeX record conf/vlsi-dat/LiuLPNSHCHCJ22

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@inproceedings{DBLP:conf/vlsi-dat/LiuLPNSHCHCJ22,
  author       = {Chi Liu and
                  Shao{-}Tzu Li and
                  Tong{-}Lin Pan and
                  Cheng{-}En Ni and
                  Yun Sung and
                  Chia{-}Lin Hu and
                  Kang{-}Yu Chang and
                  Tuo{-}Hung Hou and
                  Tian{-}Sheuan Chang and
                  Shyh{-}Jye Jou},
  title        = {An 1-bit by 1-bit High Parallelism In-RRAM Macro with Co-Training
                  Mechanism for {DCNN} Applications},
  booktitle    = {2022 International Symposium on {VLSI} Design, Automation and Test,
                  {VLSI-DAT} 2022, Hsinchu, Taiwan, April 18-21, 2022},
  pages        = {1--4},
  publisher    = {{IEEE}},
  year         = {2022},
  url          = {https://doi.org/10.1109/VLSI-DAT54769.2022.9768058},
  doi          = {10.1109/VLSI-DAT54769.2022.9768058},
  timestamp    = {Mon, 23 May 2022 16:36:24 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsi-dat/LiuLPNSHCHCJ22.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}