BibTeX record conf/vlsi-dat/ChiouHCHL19

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@inproceedings{DBLP:conf/vlsi-dat/ChiouHCHL19,
  author       = {Lih{-}Yih Chiou and
                  Chi{-}Ray Huang and
                  Chang{-}Chieh Cheng and
                  Jing{-}Yu Huang and
                  Wei{-}Suo Ling},
  title        = {A Variation-Tolerant Bitline Leakage Sensing Scheme for Near-Threshold
                  SRAMs},
  booktitle    = {International Symposium on {VLSI} Design, Automation and Test, {VLSI-DAT}
                  2019, Hsinchu, Taiwan, April 22-25, 2019},
  pages        = {1--4},
  publisher    = {{IEEE}},
  year         = {2019},
  url          = {https://doi.org/10.1109/VLSI-DAT.2019.8741606},
  doi          = {10.1109/VLSI-DAT.2019.8741606},
  timestamp    = {Wed, 16 Oct 2019 14:14:54 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsi-dat/ChiouHCHL19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}