BibTeX record conf/vdat/SreehariDKAP14

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@inproceedings{DBLP:conf/vdat/SreehariDKAP14,
  author       = {Sreehari Rao Patri and
                  Pavankumarsharma Devulapalli and
                  Dhananjay Kewale and
                  Omkar Asbe and
                  K. S. R. Krishna Prasad},
  title        = {Power optimized {PLL} implementation in 180nm {CMOS} technology},
  booktitle    = {18th International Symposium on {VLSI} Design and Test, {VDAT} 2014,
                  Coimbatore, India, July 16-18, 2014},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2014},
  url          = {https://doi.org/10.1109/ISVDAT.2014.6881065},
  doi          = {10.1109/ISVDAT.2014.6881065},
  timestamp    = {Mon, 24 May 2021 20:49:47 +0200},
  biburl       = {https://dblp.org/rec/conf/vdat/SreehariDKAP14.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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