BibTeX record conf/vdat/JainJDHVB15

download as .bib file

@inproceedings{DBLP:conf/vdat/JainJDHVB15,
  author       = {Yogesh M. Jain and
                  Aviraj R. Jadhav and
                  Harish V. Dixit and
                  Akshay S. Hindole and
                  Jithin R. Vadakoott and
                  Devendra Bilaye},
  title        = {A novel {VLSI} design of {DCTQ} processor for {FPGA} implementation},
  booktitle    = {19th International Symposium on {VLSI} Design and Test, {VDAT} 2015,
                  Ahmedabad, India, June 26-29, 2015},
  pages        = {1--5},
  publisher    = {{IEEE} Computer Society},
  year         = {2015},
  url          = {https://doi.org/10.1109/ISVDAT.2015.7208102},
  doi          = {10.1109/ISVDAT.2015.7208102},
  timestamp    = {Fri, 24 Mar 2023 00:03:43 +0100},
  biburl       = {https://dblp.org/rec/conf/vdat/JainJDHVB15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
a service of  Schloss Dagstuhl - Leibniz Center for Informatics

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.