![](https://dblp.uni-trier.de/img/logo.ua.320x120.png)
![](https://dblp.uni-trier.de/img/dropdown.dark.16x16.png)
![](https://dblp.uni-trier.de/img/peace.dark.16x16.png)
Остановите войну!
for scientists:
![search dblp search dblp](https://dblp.uni-trier.de/img/search.dark.16x16.png)
![search dblp](https://dblp.uni-trier.de/img/search.dark.16x16.png)
default search action
BibTeX record conf/supercomputer/HofmannHWF17
@inproceedings{DBLP:conf/supercomputer/HofmannHWF17, author = {Johannes Hofmann and Georg Hager and Gerhard Wellein and Dietmar Fey}, editor = {Julian M. Kunkel and Rio Yokota and Pavan Balaji and David E. Keyes}, title = {An Analysis of Core- and Chip-Level Architectural Features in Four Generations of Intel Server Processors}, booktitle = {High Performance Computing - 32nd International Conference, {ISC} High Performance 2017, Frankfurt, Germany, June 18-22, 2017, Proceedings}, series = {Lecture Notes in Computer Science}, volume = {10266}, pages = {294--314}, publisher = {Springer}, year = {2017}, url = {https://doi.org/10.1007/978-3-319-58667-0\_16}, doi = {10.1007/978-3-319-58667-0\_16}, timestamp = {Sun, 02 Oct 2022 16:16:13 +0200}, biburl = {https://dblp.org/rec/conf/supercomputer/HofmannHWF17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
![](https://dblp.uni-trier.de/img/cog.dark.24x24.png)
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.