Low-power floating bitline 8-T SRAM design with write assistant circuits.

Hao-I Yang Ssu-Yun Lai Wei Hwang Low-power floating bitline 8-T SRAM design with write assistant circuits. 239-242 2008 SoCC http://dx.doi.org/10.1109/SOCC.2008.4641519 conf/socc/2008 db/conf/socc/socc2008.html#YangLH08