A low power and low area active clock deskewing technique for sub-90nm technologies.

Ashok Narasimhan Ramalingam Sridhar A low power and low area active clock deskewing technique for sub-90nm technologies. 179-182 2008 SoCC http://dx.doi.org/10.1109/SOCC.2008.4641506 conf/socc/2008 db/conf/socc/socc2008.html#NarasimhanS08