BibTeX record conf/smacd/NeunerG19

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@inproceedings{DBLP:conf/smacd/NeunerG19,
  author       = {Maximilian Neuner and
                  Helmut Graeb},
  title        = {Power-Down Mode Verification for Hierarchical Analog Circuits},
  booktitle    = {16th International Conference on Synthesis, Modeling, Analysis and
                  Simulation Methods and Applications to Circuit Design, {SMACD} 2019,
                  Lausanne, Switzerland, July 15-18, 2019},
  pages        = {125--128},
  publisher    = {{IEEE}},
  year         = {2019},
  url          = {https://doi.org/10.1109/SMACD.2019.8795264},
  doi          = {10.1109/SMACD.2019.8795264},
  timestamp    = {Wed, 16 Oct 2019 14:14:53 +0200},
  biburl       = {https://dblp.org/rec/conf/smacd/NeunerG19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

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