BibTeX record conf/sips/WouafoCCD17

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@inproceedings{DBLP:conf/sips/WouafoCCD17,
  author       = {Hugues Wouafo and
                  Cyrille Chavet and
                  Philippe Coussy and
                  Robin Danilo},
  title        = {Efficient scalable hardware architecture for highly performant encoded
                  neural networks},
  booktitle    = {2017 {IEEE} International Workshop on Signal Processing Systems, SiPS
                  2017, Lorient, France, October 3-5, 2017},
  pages        = {1--6},
  publisher    = {{IEEE}},
  year         = {2017},
  url          = {https://doi.org/10.1109/SiPS.2017.8109986},
  doi          = {10.1109/SIPS.2017.8109986},
  timestamp    = {Wed, 16 Oct 2019 14:14:53 +0200},
  biburl       = {https://dblp.org/rec/conf/sips/WouafoCCD17.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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